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NEC PD78F9488 Computer Hardware manual available for free PDF download: User Manual
NEC PD78F9488 User Manual (388 pages)
PD789489 Subseries 8-Bit Single-Chip Microcontrollers
Brand:
NEC
| Category:
Computer Hardware
| Size: 3.79 MB
Table of Contents
Table of Contents
11
Chapter 1 General
26
Features
26
Applications
26
Ordering Information
27
Pin Configuration (Top View)
28
0S Series Lineup
31
Block Diagram
34
Overview of Functions
35
Chapter 2 Pin Functions
37
List of Pin Functions
37
Description of Pin Functions
40
P00 to P07 (Port 0)
40
P10, P11 (Port 1)
40
P20 to P25 (Port 2)
40
P30 to P34 (Port 3)
41
P50 to P53 (Port 5)
41
P60 to P67 (Port 6)
42
P70 to P73 (Port 7)
42
P80 to P87 (Port 8)
42
S0 to S27
42
COM0 to COM3
42
VLC0 to VLC2
42
Caph, Capl
42
Reset
43
X1, X2
43
Xt1, Xt2
43
Av DD
43
Av Ss
43
VDD
43
Vss
43
VPP (Flash Memory Version Only)
43
IC0 (Mask ROM Version Only)
44
Pin I/O Circuits and Recommended Connection of Unused Pins
45
Types of Pin I/O Circuits
45
I/O Circuit Types
46
Chapter 3 Cpu Architecture
48
Memory Space
48
Internal Program Memory Space
52
Internal ROM Capacity
52
Vector Table
52
Internal Data Memory Space
53
Special Function Register (SFR) Area
53
Internal High-Speed RAM, Internal Low-Speed RAM Capacity
53
Data Memory Addressing
54
Processor Registers
58
Control Registers
58
Program Counter Configuration
58
Program Status Word Configuration
58
Stack Pointer Configuration
60
Data to be Saved to Stack Memory
60
Data to be Restored from Stack Memory
60
General-Purpose Registers
61
General-Purpose Register Configuration
61
Special Function Registers (Sfrs)
62
Special Function Registers
63
Instruction Address Addressing
66
Relative Addressing
66
Immediate Addressing
67
Table Indirect Addressing
68
Register Addressing
68
Operand Address Addressing
69
Direct Addressing
69
Short Direct Addressing
70
Special Function Register (SFR) Addressing
71
Register Addressing
72
Register Indirect Addressing
73
Based Addressing
74
Stack Addressing
74
Chapter 4 Port Functions
75
Port Functions
75
Port Types
75
Port Configuration
76
Configuration of Port
76
Port Functions
76
Port 0
77
Block Diagram of P00 to P07
77
Port 1
78
Block Diagram of P10 and P11
78
Port 2
79
Block Diagram of P20
79
Block Diagram of P21
80
Block Diagram of P22 and P25
81
Block Diagram of P23
82
Block Diagram of P24
83
Port 3
84
Block Diagram of P30 to P33
84
Block Diagram of P34
85
Port 5
86
Block Diagram of P50 to P53
86
Port 6
87
Block Diagram of P60 to P67
87
Port 7
89
Block Diagram of P70 to P73
89
Port 8
90
Block Diagram of P80 to P87
90
Registers Controlling Port Function
91
Port Mode Register Format
91
Port Mode Registers and Output Latch Settings When Using Alternate Functions
92
Format of Pull-Up Resistor Option Registers
93
Port Function Register Format
93
Port Function Operation
94
Writing to I/O Port
94
Reading from I/O Port
94
Arithmetic Operation of I/O Port
94
Chapter 5 Clock Generator
95
Clock Generator Functions
95
Clock Generator Configuration
95
Configuration of Clock Generator
95
Registers Controlling Clock Generator
98
Format of Processor Clock Control Register
98
Format of Subclock Oscillation Mode Register
99
Format of Subclock Control Register
99
Subclock Selection Register Format
100
System Clock Oscillators
101
Main System Clock Oscillator
101
External Circuit of Main System Clock Oscillator
101
Subsystem Clock Oscillator
102
External Circuit of Subsystem Clock Oscillator
102
Example of Incorrect Resonator Connection
103
Examples of Incorrect Resonator Connection
103
Divider Circuit
104
When Subsystem Clock Is Not Used
104
Subsystem Clock ×4 Multiplication Circuit
104
Clock Generator Operation
105
Changing Setting of System Clock and CPU Clock
106
Time Required for Switching between System Clock and CPU Clock
106
Maximum Time Required for Switching CPU Clock
106
Switching between System Clock and CPU Clock
107
Chapter 6 16-Bit Timer 20
108
16-Bit Timer 20 Functions
108
16-Bit Timer 20 Configuration
108
Block Diagram of 16-Bit Timer 20
109
Registers Controlling 16-Bit Timer 20
110
Format of 16-Bit Timer Mode Control Register 20
111
Format of Port Mode Register 3
112
16-Bit Timer 20 Operation
113
Operation as Timer Interrupt
113
Settings of 16-Bit Timer Mode Control Register 20 for Timer Interrupt Operation
113
Interval Time of 16-Bit Timer 20
113
Timing of Timer Interrupt Operation
114
Operation as Timer Output
115
Settings of 16-Bit Timer Mode Control Register 20 for Timer Output Operation
115
Timer Output Timing
115
Capture Operation
116
Settings of 16-Bit Timer Mode Control Register 20 for Capture Operation
116
Capture Operation Timing (with both Edges of CPT20 Pin Specified)
116
Settings of Capture Edge
116
16-Bit Timer Counter 20 Readout
117
Bit Timer Counter 20 Readout Timing
117
Cautions on Using 16-Bit Timer 20
118
Restrictions When Rewriting 16-Bit Compare Register 20
118
Chapter 7 8-Bit Timers 50, 60, and 61
120
Functions of 8-Bit Timers 50, 60, and 61
120
Operation Modes
120
Block Diagram of 24-Bit Event Counter
121
Configuration of 8-Bit Timers 50, 60, and 61
122
Block Diagram of Timer 50
123
Block Diagram of Timer 60
124
Block Diagram of Timer 61
125
Block Diagram of Output Controller (Timer 60)
126
Control Registers for 8-Bit Timers 50, 60, and 61
128
Format of 8-Bit Timer Mode Control Register 50
128
Format of 8-Bit Timer Mode Control Register 60
130
Format of Carrier Generator Output Control Register 60
131
Format of 8-Bit Timer Mode Control Register 61
132
Format of Port Mode Register 3
133
Operation of 8-Bit Timers 50, 60, and 61
134
Operation as 8-Bit Timer Counter
134
Interval Time of Timer 50
135
Interval Time of Timer 60
135
Interval Time of Timer 61
135
Timing of Interval Timer Operation with 8-Bit Resolution (When Crnm Is Set to 00H)
136
Timing of Interval Timer Operation with 8-Bit Resolution (When Crnm Is Set to FFH)
137
Timing of Interval Timer Operation with 8-Bit Resolution (When Timer 60 Match Signal Is Selected for Timer 50 Count Clock)
139
Timing of Operation of External Event Counter with 8-Bit Resolution
140
Square-Wave Output Range of Timer 50
141
Timing of Square-Wave Output with 8-Bit Resolution
142
Square-Wave Output Range of Timer 60
142
Square-Wave Output Range of Timer 61
142
Operation as 16-Bit Timer Counter
143
Interval Time with 16-Bit Resolution
144
Timing of Interval Timer Operation with 16-Bit Resolution
145
Timing of External Event Counter Operation with 16-Bit Resolution
147
Square-Wave Output Range with 16-Bit Resolution
148
Timing of Square-Wave Output with 16-Bit Resolution
149
Operation as Carrier Generator
150
Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M > N))
151
Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M < N))
152
Timing of Carrier Generator Operation (When CR60 = CRH60 = N)
153
PWM Output Mode Operation (Timer 50)
154
Operation Timing in PWM Output Mode (When Rising Edge Is Selected)
154
Operation Timing When Overwriting CR50 (When Rising Edge Is Selected)
155
Operation Timing in PWM Output Mode (When both Edges Are Selected)
156
PPG Output Mode Operation (Timer 60 and Timer 61)
158
PPG Output Mode Timing (When Cr6M and Crh6M Are Overwritten)
159
Cautions on Using 8-Bit Timers 50, 60, and 61
160
Case in Which Error of 1.5 Clocks (Max.) Occurs
160
Timing of Operation as External Event Counter (8-Bit Resolution)
160
Chapter 8 Watch Timer
161
Watch Timer Functions
161
Block Diagram of Watch Timer
161
Configuration of Watch Timer
162
Interval Time of Interval Timer
162
Control Registers for Watch Timer
163
Format of Watch Timer Mode Control Register
163
Format of Watch Timer Interrupt Time Selection Register
164
Watch Timer Operation
165
Operation as Watch Timer
165
Operation as Interval Timer
165
Interval Time of Interval Timer
165
Watch Timer/Interval Timer Operation Timing
166
Chapter 9 Watchdog Timer
167
Watchdog Timer Functions
167
Watchdog Timer Program Loop Detection Time
167
Interval Time
167
Watchdog Timer Configuration
168
Block Diagram of Watchdog Timer
168
Configuration of Watchdog Timer
168
Watchdog Timer Control Registers
169
Format of Watchdog Timer Clock Selection Register
169
Format of Watchdog Timer Mode Register
170
Watchdog Timer Operation
171
Operation as Watchdog Timer
171
Watchdog Timer Program Loop Detection Time
171
Operation as Interval Timer
172
Interval Time of Interval Timer
172
Chapter 10 10-Bit A/D Converter
173
10-Bit A/D Converter Functions
173
10-Bit A/D Converter Configuration
173
Configuration of 10-Bit A/D Converter
173
Block Diagram of 10-Bit A/D Converter
174
10-Bit A/D Converter Control Registers
176
Format of A/D Converter Mode Register 0
176
Format of Analog Input Channel Specification Register 0
177
10-Bit A/D Converter Operation
178
Basic Operation of 10-Bit A/D Converter
178
Input Voltage and Conversion Result
179
Basic Operation of 10-Bit A/D Converter
179
Relationship between Analog Input Voltage and A/D Conversion Result
180
Operation Mode of 10-Bit A/D Converter
181
Software-Started A/D Conversion
181
Cautions Related to 10-Bit A/D Converter
182
How to Reduce Current Consumption in Standby Mode
182
Conversion Result Read Timing (if Conversion Result Is Normal)
183
Analog Input Pin Handling
184
A/D Conversion End Interrupt Request Generation Timing
185
Chapter 11 Serial Interface 20
186
Serial Interface 20 Functions
186
Serial Interface 20 Configuration
186
Configuration of Serial Interface 20
186
Block Diagram of Serial Interface 20
187
Serial Interface 20 Control Registers
190
Format of Serial Operation Mode Register 20
190
Format of Asynchronous Serial Interface Mode Register 20
191
Serial Interface 20 Operation Mode Settings
192
Format of Asynchronous Serial Interface Status Register 20
193
Format of Baud Rate Generator Control Register 20
194
Example of Relationship between System Clock and Baud Rate
195
Serial Interface 20 Operation
197
Operation Stop Mode
197
Asynchronous Serial Interface (UART) Mode
199
Example of Relationship between System Clock and Baud Rate
203
Format of Asynchronous Serial Interface Transmit/Receive Data
204
Asynchronous Serial Interface Transmission Completion Interrupt Timing
206
Asynchronous Serial Interface Reception Completion Interrupt Timing
207
Receive Error Timing
208
Receive Error Causes
208
3-Wire Serial I/O Mode
211
Wire Serial I/O Mode Timing
214
Chapter 12 Serial Interface 1A0
216
Function of Serial Interface 1A0
216
Configuration of Serial Interface 1A0
217
Block Diagram of Serial Interface 1A0
217
Control Registers for Serial Interface 1A0
219
Format of Serial Operation Mode Register 1A0
220
Format of Automatic Data Transmit/Receive Control Register 0
221
Format of Automatic Data Transmit/Receive Interval Specification Register 0
222
Serial Interface 1A0 Operation
224
Operation Stop Mode
224
3-Wire Serial I/O Mode
225
Wire Serial I/O Mode Timing
227
Circuit of Switching in Transfer Bit Order
229
3-Wire Serial I/O Mode with Automatic Transmit/Receive Function
230
Basic Transmit/Receive Mode Operation Timing
236
Basic Transmit/Receive Mode Flowchart
237
Buffer RAM Operation in 6-Byte Transmission/Reception (in Basic Transmit/Receive Mode)
239
Basic Transmit Mode Operation Timing
240
Basic Transmit Mode Flowchart
241
Buffer RAM Operation in 6-Byte Transmission (in Basic Transmit Mode)
242
Repeat Transmit Mode Operation Timing
244
Repeat Transmit Mode Flowchart
245
Buffer RAM Operation in 6-Byte Transmission (in Repeat Transmit Mode)
246
Automatic Transmission/Reception Suspension and Restart
248
Interval Time of Automatic Transmission/Reception
249
Timing of Interrupt Request Signal Generation
249
Chapter 13 Lcd Controller/Driver
250
LCD Controller/Driver Functions
250
LCD Controller/Driver Configuration
250
Maximum Number of Display Pixels
250
Configuration of LCD Controller/Driver
250
Correspondence with LCD Display RAM
251
LCD Controller/Driver Block Diagram
252
Registers Controlling LCD Controller/Driver
253
Format of LCD Display Mode Register 0
254
Format of LCD Clock Control Register 0
255
Frame Frequencies (Hz)
255
Format of LCD Voltage Boost Control Register 0
256
Setting LCD Controller/Driver
257
LCD Display Data Memory
257
Common and Segment Signals
258
COM Signals
258
Common Signal Waveforms
259
Voltages and Phases of Common and Segment Signals
259
Display Modes
260
Three-Time-Slice Display Example
260
Three-Time-Slice LCD Display Pattern and Electrode Connections
260
Select and Deselect Voltages (COM0 to COM2)
260
Example of Connecting Three-Time-Slice LCD Panel
261
Three-Time-Slice LCD Drive Waveform Examples (1/3 Bias Method)
262
Four-Time-Slice Display Example
263
Four-Time-Slice LCD Display Pattern and Electrode Connections
263
Select and Deselect Voltages (COM0 to COM3)
263
Example of Connecting Four-Time-Slice LCD Panel
264
Four-Time-Slice LCD Drive Waveform Examples (1/3 Bias Method)
265
Supplying LCD Drive Voltages
266
LC0 LC1 , and
266
Example of Connecting Pins for LCD Driver
266
Chapter 14 Multiplier
267
Multiplier Function
267
Multiplier Configuration
267
Block Diagram of Multiplier
268
Multiplier Control Register
269
Format of Multiplier Control Register 0
269
Multiplier Operation
270
CHAPTER 15 REMOTE CONTROLLER RECEIVER ( Μ PD789489, 78F9489 ONLY)
271
Remote Controller Receiver Functions
271
Remote Controller Receiver Configuration
271
Block Diagram of Remote Controller Receiver
272
Registers to Control Remote Controller Receiver
277
Format of Remote Controller Receive Control Register
277
Operation of Remote Controller Receiver
279
Format of Type a Reception Mode
279
Operation Flow of Type a Reception Mode
279
Example of Type a Data Format
279
Operation Flow of Type a Reception Mode
280
Timing
281
Compare Register Setting
283
Setting Example (Where N1 = 1, N2 = 2)
284
Error Interrupt Generation Timing
285
Generation Timing of INTRERR Signal
286
Noise Elimination
287
Noise Elimination Width
287
Noise Elimination Operation Example
288
Chapter 16 Interrupt Functions
290
Interrupt Function Types
290
Interrupt Sources and Configuration
290
Basic Configuration of Interrupt Function
293
Registers Controlling Interrupt Function
294
Flags Corresponding to Interrupt Request Signal Names
294
Format of Interrupt Request Flag Registers
295
Format of Interrupt Mask Flag Registers
296
Format of External Interrupt Mode Registers
297
Program Status Word Configuration
298
Format of Key Return Mode Register 00
299
Block Diagram of Falling Edge Detector
299
Format of Key Return Mode Register 01
300
Block Diagram of Falling Edge Detector
300
Interrupt Servicing Operation
301
Non-Maskable Interrupt Request Acknowledgment Operation
301
Flow from Generation of Non-Maskable Interrupt Request to Acknowledgment
302
Timing of Non-Maskable Interrupt Request Acknowledgment
302
Maskable Interrupt Request Acknowledgment Operation
303
Interrupt Request Acknowledgment Program Algorithm
303
Time from Generation of Maskable Interrupt Request to Servicing
303
Multiple Interrupt Servicing
304
Interrupt Request Acknowledgment Timing (Example: MOV A, R)
304
Example of Multiple Interrupt Servicing
305
Putting Interrupt Requests on Hold
306
Chapter 17 Standby Function
307
Standby Function and Configuration
307
Standby Function
307
Register Controlling Standby Function
308
Format of Oscillation Stabilization Time Selection Register
308
Standby Function Operation
309
HALT Mode
309
Operation Statuses in HALT Mode
309
Releasing HALT Mode by Interrupt
310
Releasing HALT Mode by RESET Input
311
Operation after Releasing HALT Mode
311
STOP Mode
312
Operation Statuses in STOP Mode
312
Releasing STOP Mode by Interrupt
313
Releasing STOP Mode by RESET Input
314
Operation after Releasing STOP Mode
314
Chapter 18 Reset Function
315
Block Diagram of Reset Function
315
Reset Timing by RESET Input
316
Reset Timing by Overflow in Watchdog Timer
316
Reset Timing by RESET Input in STOP Mode
316
Status of Hardware after Reset
317
Chapter 19 Flash Memory Version
319
Flash Memory Characteristics
320
Programming Environment
320
Environment for Writing Program to Flash Memory
320
Communication Mode
321
Communication Mode Selection Format
321
Communication Mode List
321
Example of Connection with Dedicated Flash Programmer
322
Pin Connection List
323
On-Board Pin Processing
324
Signal Conflict (Input Pin of Serial Interface)
325
Abnormal Operation of Other Device
325
Signal Conflict (RESET Pin)
326
Connection of Adapter for Flash Writing
327
Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O
327
Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O with Handshake
328
Wiring Example for Flash Writing Adapter with UART
329
Cautions on PD78F9488 and 78F9489
330
Chapter 20 Mask Options
331
Chapter 21 Instruction Set
332
Operation
332
Operand Identifiers and Description Methods
332
Description of "Operation" Column
333
Description of "Flag" Column
333
Operation List
334
Instructions Listed by Addressing Type
339
CHAPTER 22 ELECTRICAL SPECIFICATIONS ( Μ PD789488, 78F9488, 789489, 78F9489)
342
Chapter 23 Characteristics Curves of Lcd Controller/Driver
362
Chapter 24 Package Drawings
364
Chapter 25 Recommended Soldering Conditions
366
Surface Mounting Type Soldering Conditions
366
Appendix A Development Tools
369
A-1 Development Tools
370
A.1 Software Package
371
Language Processing Software
371
Software Package
371
A.3 Control Software
372
Control Software
372
Flash Memory Writing Tools
372
Debugging Tools (Hardware)
373
Debugging Tools (Software)
374
Appendix B Notes on Target System Design
375
B-1 Distance between In-Circuit Emulator and Conversion Socket (80GC)
375
B-1 Distance between IE System and Conversion Adapter
375
B-2 Connection Conditions of Target System (When NP-80GC-TQ Is Used)
376
B-3 Connection Conditions of Target System (When NP-H80GC-TQ Is Used)
376
B-4 Distance between In-Circuit Emulator and Conversion Adapter (80GK)
377
B-5 Connection Conditions of Target System (When NP-80GK Is Used)
378
B-6 Connection Conditions of Target System (When NP-H80GK-TQ Is Used)
378
Appendix C Register Index
379
Register Index (Register Names in Alphabetic Order)
379
C.1 Register Index (Register Names in Alphabetic Order)
379
Register Index (Register Symbols Alphabetic Order)
382
Appendix D Revision History
385
Differences between Μ PD78F9488, 78F9489, and Mask ROM Version
386
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