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VRC4172 mPD31172
NEC VRC4172 mPD31172 Manuals
Manuals and User Guides for NEC VRC4172 mPD31172. We have
1
NEC VRC4172 mPD31172 manual available for free PDF download: User Manual
NEC VRC4172 mPD31172 User Manual (177 pages)
Companion Chip for VR4121
Brand:
NEC
| Category:
Microcontrollers
| Size: 0.77 MB
Table of Contents
Table of Contents
9
Chapter 1 Overview
17
Features
17
Ordering Information
17
VRC 4172 Processor
18
Internal Block Configuration
19
Registers of each Unit
20
Chapter 2 Pin Functions
25
Pin Configuration
25
List of Pin Functions
29
System Bus Interface Signals
29
USB Interface Signals
30
IEEE1284 Interface Signals
30
RS-232-C Interface Signals
31
PS/2 Interface Signals
31
General-Purpose Port Signal
31
General-Purpose Chip Select Signal
31
LCD Interface Signal
31
Clock Signals
32
Pin Statuses
33
Status of Pins under Specific Conditions
33
External Processing of Pins and Drive Performance
35
Recommended Connection of Unused Pins
37
Chapter 3 Address Map
39
Internal I/O Spaces
40
PCI Master Window (Memory)
41
PCI Configuration Cycle
41
PCI Host Controller
45
PCI Master Window (I/O)
52
PCI Slave Window (Memory)
52
Chapter 4 Gpio (General-Purpose I/O Port)
53
Register Set
53
EXGPDATA0 (0X1500 1080)
54
EXGPDIR0 (0X1500 1082)
55
EXGPINTEN0 (0X1500 1084)
56
EXGPINTST0 (0X1500 1086)
57
EXGPINTTYP0 (0X1500 1088)
58
EXGPINTLV0L (0X1500 108A)
59
EXGPINTLV0H (0X1500 108C)
60
EXGPDATA1 (0X1500 10C0)
61
EXGPDIR1 (0X1500 10C2)
62
EXGPINTEN1 (0X1500 10C4)
63
EXGPINTST1 (0X1500 10C6)
64
EXGPINTTYP1 (0X1500 10C8)
65
EXGPINTLV1L (0X1500 10CA)
66
Chapter 5 Pcs (Programmable Chip Select)
67
Register Set
67
EXCS Compare Address Registers
68
EXCS Address Mask Registers
70
Chapter 6 Pwm Controller
73
Register Set
73
LCDDUTYEN (0X1500 3880)
74
LCDFREQ (0X1500 3882)
75
LCDDUTY (0X1500 3884)
76
Chapter 7 Pmu (Power Management Unit)
77
Register Set
77
SYSCLKCTRL (0X1500 3800)
78
1284CTRL (0X1500 3802)
79
16550CTRL (0X1500 3804)
80
USBCTRL (0X1500 380C)
81
PS2PWMCTRL (0X1500 380E)
82
Clock Supply
83
Chapter 8 Icu (Interrupt Control Unit)
85
Register Set
85
1284INTRQ (0X1500 3808)
86
16550INTRQ (0X1500 380A)
87
Chapter 9 Ieee1284 Parallel Controller
89
Macro Functions
89
Register Set
92
DATA (0X1500 3820: MODE (2:0) = 001, 100, dir = 1, During Read)
93
DATA (0X1500 3820: MODE (2:0) = 000, 001, 100, dir = 0, During Write)
93
AFIFO (0X1500 3820: MODE (2:0) = 011, dir = 0, During Write)
94
DSR (0X1500 3822)
95
DCR (0X1500 3824)
96
MCR (0X1500 3826: MODE (2:0) = 000, 001)
97
EPPA (0X1500 3826: MODE (2:0) = 100)
98
EPPD (0X1500 3828: MODE (2:0) = 100)
99
CFIFO (0X1500 3830: MODE (2:0) = 010)
99
DFIFO (0X1500 3830: MODE (2:0) = 011)
100
TFIFO (0X1500 3830: MODE (2:0) = 110)
101
CNFGA (0X1500 3830: MODE (2:0) = 111)
102
CNFGB (0X1500 3832: MODE (2:0) = 111)
103
ECR (0X1500 3834)
104
Chapter 10 16550 Serial Controller
105
Register Set
105
RBR (0X1500 3810: LCR7 = 0, During Read)
106
THR (0X1500 3810: LCR7 = 0, During Write)
106
DLL (0X1500 3810: LCR7 = 1)
107
IER (0X1500 3812: LCR7 = 0)
108
DLM (0X1500 3812: LCR7 = 1)
109
IIR (0X1500 3814: During Read)
111
FCR (0X1500 3814: During Write)
113
LCR (0X1500 3816)
114
MCR (0X1500 3818)
115
LSR (0X1500 381A)
116
MSR (0X1500 381C)
118
SCR (0X1500 381E)
119
Chapter 11 Usb Host Controller
121
Features
121
USB Host Control Configuration Registers
122
Register Set
123
Command Register (Offset Address: 0X04)
124
Status Register (Offset Address: 0X06)
125
Base Address Register (Offset Address: 0X10)
127
Power Management Control/Status Register (Offset Address: 0Xe0)
128
Operational Registers
130
Register Set
130
Hcrevision (Offset Address: 0X00)
131
Hccontrol (Offset Address: 0X04)
132
Hccommandstatus (Offset Address: 0X08)
134
Hcinterruptstatus (Offset Address: 0X0C)
136
Hcinterruptenable (Offset Address: 0X10)
138
Hcinterruptdisable (Offset Address: 0X14)
140
Hchcca (Offset Address: 0X18)
142
Hcperiodcurrented (Offset Address: 0X1C)
143
Hccontrolheaded (Offset Address: 0X20)
144
Hccontrolcurrented (Offset Address: 0X24)
145
Hcbulkheaded (Offset Address: 0X28)
146
Hcbulkcurrented (Offset Address: 0X2C)
147
Hcdonehead (Offset Address: 0X30)
148
Hcfminterval (Offset Address: 0X34)
149
Hcfmremaining (Offset Address: 0X38)
150
Hcfmnumber (Offset Address: 0X3C)
151
Hcperiodicstart (Offset Address: 0X40)
152
Hclsthreshold (Offset Address: 0X44)
153
Hcrhdescriptora (Offset Address: 0X48)
154
Hcrhdescriptorb (Offset Address: 0X4C)
156
Hcrhstatus (Offset Address: 0X50)
158
Hcrhportstatus 1 and 2 (Offset Address: 0X54, 0X58)
161
Register Set
165
PS2DATA (0X1500 3870)
166
PS2CTRL (0X1500 3872)
167
Chapter 12 Ps/2 Controller
168
Transmit Procedure
168
Chapter 13 Connection with V R 4121
169
Load Reduction Buffer Control
169
Cautions When Connecting Load Reduction Buffer
170
Chapter 14 Interrupt Signals
171
Chapter 15 Reset
173
Chapter 16 Usage Cautions
175
Power Supply Control
175
Reset Pins
175
Cautions on
175
Preserving SDRAM Data
176
Appendix General Index
177
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