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NEC V850E/MA2 32-Bit Microcontroller Manuals
Manuals and User Guides for NEC V850E/MA2 32-Bit Microcontroller. We have
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NEC V850E/MA2 32-Bit Microcontroller manual available for free PDF download: Application Note
NEC V850E/MA2 Application Note (99 pages)
32-Bit Single-Chip Microcontrollers PCI Host Bridge Macro
Brand:
NEC
| Category:
Microcontrollers
| Size: 0.91 MB
Table of Contents
Table of Contents
8
Chapter 1 Overview of each Product
10
Outline
10
Features
11
Ordering Information
12
Pin Configuration
14
Internal Block Diagram
25
Chapter 2 Overview of Pci Host Bridge Macro
29
Outline
29
Features
30
Chapter 3 Specifications of Pci Host Bridge Macro
31
Internal Blocks of PCI Host Bridge Macro
31
Relationship between Internal Blocks and Signals
32
Pin Functions
33
External Bus Slave Interface Pins
33
SDRAM Bus Interface Pins
33
PCI Bus Interface Pins
34
Registers
35
PCI_CONFIG_DATA Register
35
PCI_CONFIG_ADD Register
36
PCI_CONTROL Register
37
PCI_IO_BASE Register
38
PCI_MEM_BASE Register
38
PCI_INT_CTL Register
39
PCI_ERR_ADD Register
40
SYSTEM_MEM_BASE Register
41
SYSTEM_MEM_RANGE Register
41
SDRAM_CTL Register
42
Address Map
44
Initializing PCI Host Bridge Macro
45
Bus Width of External Bus Interface
46
Timing
47
External Bus Interface Timing
47
PCI Bus Interface Timing
50
Chapter 4 Configuration Examples of Fpga Integration
57
Conditions for Configuration Examples of FPGA Integration
57
Points to Remember When Creating Top Layer of FPGA
57
Reference Diagram for FPGA Top Connection
58
FPGA Top Pin Functions
59
CPU Bus Slave Interface Pins
59
SDRAM Bus Interface Pins
59
PCI Bus Interface Pins
60
FPGA Top Pin Configuration
61
Internal Connection Diagram of External Bus Interface
61
Internal Connection Diagram of PCI Bus Interface
62
External Connection Diagram of External Bus Interface (Example of Connection with V850E/ME2)
63
External Connection Diagram of PCI Bus Interface
64
Cautions on Designing FPGA
65
FPGA Fitting Design
65
PCI Bus Interface Timing Parameters (as Constraint of PCI CLK = 33 Mhz)
65
SDRAM Interface Timing
66
Chapter 5 Application Examples
67
Block Diagram of Evaluation Board
67
Specifications of Evaluation Board
68
Example of Evaluation Board Connection Circuit
69
Evaluation Board Memory Space
70
Sample Program Examples
72
Development Tools
72
Program Configuration
72
V850E/ME2 PCI Host Bridge Macro Initialization Sample Program List
73
PCI Configuration Space Access Sample Program List
76
IDE HDD Access Sample Program List
79
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