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3. BLOCK DIAGRAM
INTP2/NMI
PROGRAMMABLE
INTERRUPT
INTP0, INTP1,
CONTROLLER
INTP3-INTP6
TI00
TIMER/COUNTER
TI01
(16 BITS)
TO0
TIMER/COUNTER1
TI1
(8 BITS)
TO1
TIMER/COUNTER2
TI2
(8 BITS)
TO2
TIMER/COUNTER5
(8 BITS)
TIMER/COUNTER6
(8 BITS)
WATCH TIMER
WATCHDOG TIMER
REAL-TIME
RTP0-RTP7
OUTPUT PORT
ANO0
ANO1
D/A
CONVERTER
AV
REF1
AV
SS
ANI0-ANI7
A/D
AV
CONVERTER
DD
AV
SS
CLOCK OUTPUT
PCL
CONTROL
BUZZER OUTPUT
BUZ
8
78K/IV
FLASH
CPU CORE
MEMORY
RAM
µ PD78F4225Y
RxD1/SI1
UART/IOE1
TxD1/SO1
BAUD-RATE
ASCK1/SCK1
GENERATOR
RxD2/SI2
UART/IOE2
TxD2/SO2
BAUD-RATE
ASCK2/SCK2
GENERATOR
SI0/SDA0
CLOCKED
SERIAL
SO0
INTERFACE
SCK0/SCL0
AD0-AD7
A8-A15
A16-A19
BUS I/F
RD
WR
WAIT
ASTB
EXA
PORT0
P00-P05
PORT1
P10-P17
PORT2
P20-P27
PORT3
P30-P37
PORT4
P40-P47
PORT5
P50-P57
PORT6
P60-P67
PORT7
P70-P72
PORT12
P120-P127
PORT13
P130,P131
RESET
X1
SYSTEM CONTROL
X2
XT1
XT2
V
, V
DD0
DD1
V
, V
SS0
SS1
TEST/V
PP
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