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(2) TMPn capture/compare register 1 (TPnCCR1)
The TPnCCR1 register is a 16-bit register that functions both as a capture register and as a compare register.
Whether this register functions as a capture register or as a compare register can be controlled with the
TPnCCS1 bit of the TPnOPT0 register, but only in the free-running mode.
In the pulse width measurement mode, this register can be used as a dedicated capture register (the compare
function cannot be used.)
In modes other than the free-running mode and pulse width measurement mode, this register is used as a
dedicated compare register.
In the initial setting, the TPnCCR1 register is a reload register.
This register can be read or written in 16-bit units.
Reset input clears this register to 0000H.
After reset: 0000H
15
TPnCCR1
(n = 0 to 5)
• Use as a compare register
TPnCCR1 can be rewritten when TPnCE = 1
The timing at which the TPnCCR1 rewrite values become valid when TPnCE = 1 is as follows.
TMP Operation Mode
PWM output mode, external trigger pulse output mode
Free-running mode, external event count mode, one-shot
pulse output mode, interval timer mode
Pulse width measurement mode
• Use as a capture register
The counter value is saved to TPnCCR1 upon capture trigger (TIPn1) input edge detection.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P
R/W
Address: TP0CCR1 FFFFF598H, TP1CCR1 FFFFF5A8H,
TP2CCR1 FFFFF5B8H, TP3CCR1 FFFFF5C8H,
TP4CCR1 FFFFF5D8H, TP5CCR1 FFFFF5E8H
13
12
11
10
9
14
Preliminary User's Manual U16541EJ1V0UM
8
7
6
5
4
3
Method of Writing TPnCCR1 Register
Reload
Anytime write
Cannot be used because dedicated capture register
2
1
0
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