Table of Contents
Advertisement
(2) 4-buffer mode (External trigger select: 4-buffer)
One analog input is A/D converted four times using the ADTRG signal as a trigger and the results are stored in
the ADCR0 to ADCR3 registers. The INTAD interrupt is generated and conversion ends when the four A/D
conversions end.
Trigger
ADTRG signal
ADTRG signal
ADTRG signal
ADTRG signal
While the CE bit of the ADM0 register is 1, A/D conversion is repeated every time a trigger is input from the
ADTRG pin.
This is most appropriate for applications that determine the average A/D conversion results.
Figure 11-16. Example of 4-Buffer Mode (External Trigger Select 4-Buffer) Operation
(×4)
ADTRG
(1)
CE bit of ADM0 is set to 1 (enable)
(2)
External trigger generation
(3)
ANI2 A/D conversion
(4)
Conversion result is stored in ADCR0
(5)
External trigger generation
(6)
ANI2 A/D conversion
(7)
Conversion result is stored in ADCR1
342
CHAPTER 11 A/D CONVERTER
Analog Input
A/D Conversion Result Register
ANIn
ADCR0
ANIn
ADCR1
ANIn
ADCR2
ANIn
ADCR3
ANI0
ANI1
ANI2
(×4)
ANI3
User's Manual U12688EJ4V0UM00
(n = 0 to 3)
A/D converter
(8)
External trigger generation
(9)
ANI2 A/D conversion
(10) Conversion result is stored in ADCR2
(11) External trigger generation
(12) ANI2 A/D conversion
(13) Conversion result is stored in ADCR3
(14) INTAD interrupt generation
ADCR0
ADCR1
ADCR2
ADCR3
ADCR4
ADCR5
ADCR6
ADCR7
Advertisement
Table of Contents
