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Change of R/W and bit units for manipulation for PMX and PMCX in 3.4.8 Peripheral I/O registers
p. 98
p. 108
Addition of Caution to 4.5.2 (1) Bus size configuration register (BSC)
p. 151
Modification of WAIT signal in Figure 5-10 DRAM Access Timing During DMA Flyby Transfer
p. 172
Addition of interrupt factor (INTAD) to 6.3.6 DMA trigger factor registers 0 to 3 (DTFR0 to DTFR3)
Deletion of part of explanation from 8.5.1 (3) (a) When in the PLL mode
p. 235
p. 235
Deletion of 8.5.1 (3) (b) When in the Direct mode
p. 326
Modification of Figure 11-3 Select Mode Operation Timing: 1-Buffer Mode (ANI1)
p. 349
Change of block type of Port 2 in 12.2 (1) Function of each port
Modification of Figure 12-3 Type C Block Diagram
p. 355
p. 367
Addition of Figure 12-17 Type Q Block Diagram
p. 374
Change of block types of P22 and P25 in 12.3.3 (1) Operation in control mode
p. 375
Modification of Caution in 12.3.3 (2) (a) Port 2 mode register (PM2)
p. 378
Deletion of Caution from 12.3.4 (2) (a) Port 3 mode register (PM3)
Deletion of Caution from 12.3.12 (2) (a) Port 11 mode register (PM11)
p. 398
p. 407
Addition of Caution and modification of explanation in 12.3.16 (2) (a) Port X mode register (PMX)
p. 408
Addition of Caution and modification of explanation in 12.3.16 (2) (b) Port X mode control register (PMCX)
Major Revisions in This Edition
Description
The mark
shows major revised points.
User's Manual U12688EJ4V0UM00
7
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